MATLAB SIMULINK HDL CODER 1 Manual do Utilizador descarregar pdf (Página 11)

9/21/2011

Model-Based Design for Implementation

Verification

MATLABMATLAB

® ®

andand SimulinkSimulink

®®

Algorithm and System DesignAlgorithm and System Design

Model Refinement for HardwareModel Refinement for Hardware

Verification

Static Timing Analysis

Timing Simulation

Back Annotation

Implement Design

Map

Synthesis

Functional Simulation

Back Annotation

HDL CoHDL Co--SimulationSimulation

Automatic HDL Automatic HDL

Code GenerationCode Generation

Behavioral Simulation

Map

Place & Route

FPGA Hardware

Implement Design

Map

Place & Route

Synthesis

Verification

Static Timing Analysis

Timing Simulation

Functional Simulation

Model-Based Design for Implementation

MATLABMATLAB

® ®

andand SimulinkSimulink

®®

Algorithm and System DesignAlgorithm and System Design

Model Refinement for HardwareModel Refinement for Hardware

Back Annotation

HDL CoHDL Co--SimulationSimulation

Automatic HDL Automatic HDL

Code GenerationCode Generation

Behavioral Simulation

FPGA Hardware

Implement Design

Map

Place & Route

Synthesis

Verification

Static Timing Analysis

Timing Simulation

Functional Simulation

FPGA HardwareFPGA Hardware

FPGAFPGA--inin--thethe--LoopLoop

1 2 ... 6 7 8 9 10 11 12 13 14 15 16 ... 45 46

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